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general description max1846/max1847 high-efficiency pwm inverting con- trollers allow designers to implement compact, low- noise, negative-output dc-dc converters for telecom and networking applications. both devices operate from +3v to +16.5v input and generate -500mv to -200v output. to minimize switching noise, both devices feature a current-mode, constant-frequency pwm control scheme. the operating frequency can be set from 100khz to 500khz through a resistor. the max1846 is available in an ultra-compact 10-pin max ? package. operation at high frequency, compat- ibility with ceramic capacitors, and inverting topology without transformers allow for a compact design. compatibility with electrolytic capacitors and flexibility to operate down to 100khz allow users to minimize the cost of external components. the high-current output drivers are designed to drive a p-channel mosfet and allow the converter to deliver up to 30w. the max1847 features clock synchronization and shut- down functions. the max1847 can also be configured to operate as an inverting flyback controller with an n- channel mosfet and a transformer to deliver up to 70w. the max1847 is available in a 16-pin qsop package. current-mode control simplifies compensation and pro- vides good transient response. accurate current-mode control and over current protection are achieved through low-side current sensing. applications cellular base stations networking equipment optical networking equipment slic supplies co dsl line driver supplies industrial power supplies automotive electronic power supplies servers voip supplies features 90% efficiency +3.0v to +16.5v input range -500mv to -200v output drives high-side p-channel mosfet 100khz to 500khz switching frequency current-mode, pwm control internal soft-start electrolytic or ceramic output capacitor the max1847 also offers: synchronization to external clock shutdown n-channel inverting flyback option max1846/max1847 high-efficiency, current-mode, inverting pwm controller ________________________________________________________________ maxim integrated products 1 max1846 max1847 vl in comp freq ref gnd fb pgnd cs ext p positive v in negative v out typical operating circuit 19-2091; rev 2; 9/10 evaluation kit available ordering information part temp range pin-package max1846 eub -40 c to +85 c 10 max max1846eub+ -40 c to +85 c 10 max max1847 eee -40 c to +85 c 16 qsop max1847eee+ -40 c to +85 c 16 qsop pin configurations appear at end of data sheet. + denotes a lead(pb)-free/rohs-compliant package. max is a registered trademark of maxim integrated products, inc. for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim's website at www.maxim-ic.com.
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v shdn = v in = +12v, sync = gnd, pgnd = gnd, r freq = 147k ? 1%, c vl = 0.47f, c ref = 0.1f, t a = 0c to +85c , unless otherwise noted.) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, shdn to gnd ...................................................-0.3v to +20v pgnd to gnd .......................................................-0.3v to +0.3v vl to pgnd for v in 5.7v...........................-0.3v to (v in + 0.3v) vl to pgnd for v in > 5.7v .......................................-0.3v to +6v ext to pgnd ...............................................-0.3v to (v in + 0.3v) ref, comp to gnd......................................-0.3v to (vl + 0.3v) cs, fb, freq, pol, sync to gnd .........................-0.3v to +6v continuous power dissipation (t a = +70c) 10-pin max (derate 5.6mw/c above +70c) ...........444mw 16-pin qsop (derate 8.3mw/c above +70c)...........696mw operating temperature range ...........................-40c to +85c junction temperature ......................................................+150c storage temperature range .............................-65c to +150c lead temperature (soldering, 10s) .................................+300c soldering temperature (reflow) lead(pb)-free...............................................................+260c containing lead(pb) .....................................................+240c parameter conditions min typ max units pwm controller operating input voltage range 3.0 16.5 v v in rising 2.8 2.95 uvlo threshold v in falling 2.6 2.74 v uvlo hysteresis 60 mv fb threshold no load -12 0 12 mv fb input current v fb = -0.1v -50 -6 50 na load regulation c comp = 0.068f, v out = -48v, i out = 20ma to 200ma (note 1) -1 0 % line regulation c comp = 0.068f, v out = -48v, v in = +8v to +16.5v, i out = 100ma 0.04 % current-limit threshold 85 100 115 mv cs input current cs = gnd 10 20 a supply current v fb = -0.1v, v in = +3.0v to +16.5v 0.75 1.2 ma shutdown supply current shdn = gnd, v in = +3.0v to +16.5v 10 25 a reference and vl regulator ref output voltage i ref = 50a 1.236 1.25 1.264 v ref load regulation i ref = 0 to 500a -2 -15 mv vl output voltage i vl = 100a 3.85 4.25 4.65 v vl load regulation i vl = 0.1ma to 2.0ma -20 -60 mv
max1846/max1847 high-efficiency, current-mode, inverting pwm controller _______________________________________________________________________________________ 3 electrical characteristics (continued) (v shdn = v in = +12v, sync = gnd, pgnd = gnd, r freq = 147k ? 1%, c vl = 0.47f, c ref = 0.1f, t a = 0c to +85c , unless otherwise noted.) oscillator r freq = 500k ? 1% 90 100 110 r freq = 147k ? 1% 255 300 345 oscillator frequency r freq = 76.8k ? 1% 500 khz r freq = 500k ? 1% 93 96 97 r freq = 147k ? 1% 85 88 90 maximum duty cycle r freq = 76.8k ? 1% 80 % sync input signal duty-cycle range 7 93 % minimum sync input logic-low pulse width 50 200 ns sync input rise/fall time (note 2) 200 ns sync input frequency range 100 550 khz digital inputs pol, sync, shdn input high voltage 2.0 v pol, sync, shdn input low voltage 0.45 v pol, sync input current pol, sync = gnd or vl 20 40 a v shdn = +5v or gnd -12 -4 0 shdn input current v shdn = +16.5v 1.5 6 a soft-start soft-start clock cycles 1024 cycles soft-start levels 64 ext output ext sink/source current v in = +5v, v ext forced to +2.5v 1 a ext high or low, tested with 100ma load, v in = +5v 2 5 ext on-resistance ext high or low, tested with 100ma load, v in = +3v 5 10 ? note 1: production test correlates to operating conditions. note 2: guaranteed by design and characterization.
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 4 _______________________________________________________________________________________ electrical characteristics (v shdn = v in = +12v, sync = gnd, pgnd = gnd, r freq = 147k ? 1%, c vl = 0.47f, c ref = 0.1f, t a = -40c to +85c , unless otherwise noted.) (note 3) parameter conditions min max units pwm controller operating input voltage range 3.0 16.5 v v in rising 2.95 uvlo threshold v in falling 2.6 v fb threshold no load -20 +20 mv fb input current v fb = -0.1v -50 +50 na load regulation c comp = 0.068f, v out = -48v, i out = 20ma to 200ma (note 1) -2 0 % current limit threshold 85 115 mv cs input current cs = gnd 20 a supply current v fb = -0.1v, v in = +3.0v to +16.5v 1.2 ma shutdown supply current shdn = gnd, v in = +3.0v to +16.5v 25 a reference and vl regulator ref output voltage i ref = 50a 1.225 1.275 v ref load regulation i ref = 0 to 500a -15 mv vl output voltage i vl = 100a 3.85 4.65 v vl load regulation i vl = 0.1ma to 2.0ma -60 mv oscillator r freq = 500k ? 1% 84 116 oscillator frequency r freq = 147k ? 1% 255 345 khz r freq = 500k ? 1% 93 98 maximum duty cycle r freq = 147k ? 1% 84 93 % sync input signal duty-cycle range 7 93 % minimum sync input logic low pulse width 200 ns sync input rise/fall time (note 2) 200 ns sync input frequency range 100 550 khz digital inputs pol, sync, shdn input high voltage 2.0 v pol, sync, shdn input low voltage 0.45 v
max1846/max1847 high-efficiency, current-mode, inverting pwm controller _______________________________________________________________________________________ 5 100 0 1 10 100 1000 10,000 efficiency vs. load current 20 max1846/7 toc01 load current (ma) efficiency (%) 40 60 80 70 50 30 10 90 v in = 5v v in = 16.5v v out = -5v application circuit a 100 0 1 10 100 1000 10,000 efficiency vs. load current 20 max1846/7 toc02 load current (ma) efficiency (%) 40 60 80 70 50 30 10 90 v in = 5v v in = 3.3v v out = -12v application circuit b v in = 3v 90 0 1 1000 100 10 efficiency vs. load current 30 10 70 50 100 40 20 80 60 max1846/7 toc03 load current (ma) efficiency (%) v in = 12v v in = 16.5v application circuit c v out = -48v -12.10 -12.04 -12.06 -12.08 -12.02 -12.00 -11.98 -11.96 -11.94 -11.92 -11.90 0 200 100 300 400 500 600 output voltage load regulation max1846/7 toc04 load current (ma) output voltage (v) application circuit b v in = 5v 0 0.4 0.2 0.8 0.6 1.0 1.2 1.4 1.6 046 2 8 10 12 14 16 supply current vs. supply voltage max1846/7 toc05 v in (v) i in (ma) v fb = -0.1v 1.238 1.246 1.242 1.254 1.250 1.258 1.262 -40 20 40 -20 0 60 80 100 reference voltage vs. temperature max1846/7 toc06 temperature ( c) v ref (v) typical operating characteristics (circuit references are from table 1 in the main application circuits section, c vl = 0.47f, c re f = 0.1f, t a = +25c, unless otherwise noted.) electrical characteristics (continued) (v shdn = v in = +12v, sync = gnd, pgnd = gnd, r freq = 147k ? 1%, c vl = 0.47f, c ref = 0.1f, t a = -40c to +85c , unless otherwise noted.) (note 3) parameter conditions min max units pol, sync input current pol, sync = gnd or vl 40 a v shdn = +5v or gnd -12 0 shdn input current v shdn = +16.5v 6 a ext output ext high or low, i ext = 100ma, v in = +5v 7.5 ext on-resistance ext high or low, i ext = 100ma, v in = +3v 12 ? note 3: parameters to -40c are guaranteed by design and characterization.
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 6 _______________________________________________________________________________________ shutdown supply current vs. temperature max1846/7 toc10 0 2 6 4 12 14 10 8 16 shutdown supply current ( a) -40 0 20 -20 40 60 80 100 temperature ( c) v in = 10v v in = 16.5v v in = 3v 0 4 2 8 6 12 10 14 -40 0 20 -20 40 60 80 100 operating current vs. temperature max1846/7 toc11 temperature ( c) operating current (ma) a b c a: v in = 3v, v out = -12v b: v in = 5v, v out = -5v c: v in = 16.5v, v out = -5v application circuit a 0 100 300 200 400 500 0200 100 300 400 500 600 switching frequency vs. r freq max1846/7 toc12 r freq (k ? ) f osc (khz) switching frequency vs. temperature max1846/7 toc13 294 295 297 296 300 301 299 298 302 frequency (khz) -40 0 20 -20 40 60 80 100 temperature ( c) r freq = 147k ? 1% 0 40 20 60 120 140 100 80 160 0 2000 4000 6000 8000 10,000 ext rise/fall time vs. capacitance max1846/7 toc14 capacitance (pf) time (ns) rise time fall time v in = 12v i l 0 5v/div 1a/div 5v/div v out exiting shutdown max1846/7 toc15 application circuit b 1ms/div shdn typical operating characteristics (continued) (circuit references are from table 1 in the main application circuits section, c vl = 0.47f, c re f = 0.1f, t a = +25c, unless otherwise noted.) 1.240 1.245 1.255 1.250 1.260 0 100 200 300 400 500 reference load regulation max1846/7 toc07 i ref ( a) v ref (v) 4.100 4.180 4.140 4.260 4.220 4.300 4.340 -40 20 40 -20 0 60 80 100 vl voltage vs. temperature max1846/7 toc08 temperature ( c) vl (v) i vl = 0 4.22 4.23 4.24 4.25 4.26 4.27 0 0.8 1.0 0.4 0.6 0.2 1.2 1.4 1.6 1.8 2.0 vl load regulation max1846/7 toc09 i vl (ma) vl (v)
max1846/max1847 high-efficiency, current-mode, inverting pwm controller _______________________________________________________________________________________ 7 i l 0 5v/div 1a/div 5v/div v out entering shutdown max1846/7 toc16 application circuit b 1ms/div shdn i l lx 1a/div 10v/div 100mv/div v out heavy-load switching waveform max1846/7 toc17 application circuit b 1 s/div i load = 600ma i l lx 1a/div 10v/div 100mv/div v out light-load switching waveform max1846/7 toc18 application circuit b 1 s/div i load = 50ma i l 1a/div 500mv/div i load v out load-transient response max1846/7 toc19 application circuit b 2ms/div i load = 10ma to 400ma i l 500ma/div 200mv/div i load v out load-transient response max1846/7 toc20 application circuit c 400 s/div i load = 4ma to 100ma typical operating characteristics (continued) (circuit references are from table 1 in the main application circuits section, c vl = 0.47f, c re f = 0.1f, t a = +25c, unless otherwise noted.)
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 8 _______________________________________________________________________________________ pin description pin max1846 max1847 name function 1 pol sets polarity of the ext pin. connect pol to gnd to set ext for use with an external pmos high-side fet. connect pol to vl to set ext for use with an external nmos low- side fet in transformer-based applications. 1 2 vl vl low-dropout regulator. connect 0.47f ceramic capacitor from vl to gnd. 2 3 freq oscillator frequency set input. connect a resistor (r freq ) from freq to gnd to set the internal oscillator frequency from 100khz (r freq = 500k ? ) to 500khz (r freq = 76.8k ? ). r freq is still required if an external clock is used at sync. see setting the operating frequency section. 3 4 comp compensation node for error amp/integrator. connect a series resistor/capacitor network from comp to gnd for loop compensation. see design procedure . 4 5 ref 1.25v reference output. ref can source up to 500a. bypass with a 0.1f ceramic capacitor from ref to gnd. 56fb feedback input. connect fb to the center of a resistor-divider connected between the output and ref. the fb threshold is 0. 7, 9 n.c. no connection 8 shdn shutdown control. drive shdn low to turn off the dc-dc controller. drive high or connect to in for normal operation. 6 10, 11 gnd analog ground. connect to pgnd. 7 12 pgnd negative rail for ext driver and negative current-sense input. connect to gnd. 813cs p osi ti ve c ur r ent- s ense inp ut. c onnect a cur r ent- sense r esi stor ( r c s ) b etw een c s and 9 14 ext external mosfet gate-driver output. ext swings from in to pgnd. 10 15 in power-supply input 16 sync operating frequency synchronization control. drive sync low or connect to gnd to set the internal oscillator frequency with r freq . drive sync with a logic-level clock input signal to externally set the converters operating frequency. dc-dc conversion cycles initiate on the rising edge of the input clock signal. note that when driving sync with an external signal, r freq must still be connected to freq.
max1846/max1847 high-efficiency, current-mode, inverting pwm controller _______________________________________________________________________________________ 9 max1847 ref fb gnd cs ext pgnd freq comp vl in 0.22 f 150k ? 0.1 f r2 10.0k ? 1% r1 95.3k ? 1% 0.02 ? 1w 10 h do5022p-103 cmsh5-40 47 f 16v fds6375 3 x 22 f 10v pol sync shdn 10k ? 47 f 16v 22k ? 1 2 16 8 3 4 5 10, 11 6 12 13 14 15 7, 9 n.c. v in +3v to +5.5v 0.47 f v out -12v at 400ma sanyo 16tpb47m 1200pf 220pf typical application circuit
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 10 ______________________________________________________________________________________ max1846 max1847 startup circuitry control circuitry vl regulator oscillator reference slope comp under- voltage lock out soft-start in max1847 only max1847 only pol freq comp fb ref sync shdn error amplifier current- sense amplifier gnd error comparator ext driver ext vl cs pgnd pgnd g m x3.3 functional diagram
max1846/max1847 high-efficiency, current-mode, inverting pwm controller ______________________________________________________________________________________ 11 detailed description the max1846/max1847 current-mode pwm controllers use an inverting topology that is ideal for generating output voltages from -500mv to -200v. features include shutdown, adjustable internal operating frequency or synchronization to an external clock, soft-start, adjustable current limit, and a wide (+3v to +16.5v) input range. pwm controller the architecture of the max1846/max1847 current- mode pwm controller is a bicmos multi-input system that simultaneously processes the output-error signal, the current-sense signal, and a slope-compensation ramp ( functional diagram ). slope compensation pre- vents subharmonic oscillation, a potential result in cur- rent-mode regulators operating at greater than 50% duty cycle. the controller uses fixed-frequency, cur- rent-mode operation where the duty ratio is set by the input-to-output voltage ratio. the current-mode feed- back loop regulates peak inductor current as a function of the output error signal. internal regulator the max1846/max1847 incorporate an internal low- dropout regulator (ldo). this ldo has a 4.25v output and powers all max1846/max1847 functions (exclud- ing ext) for the primary purpose of stabilizing the per- formance of the ic over a wide input voltage range (+3v to +16.5v). the input to this regulator is connect- ed to in, and the dropout voltage is typically 100mv, so that when v in is less than 4.35v, vl is typically v in minus 100mv. when the ldo is in dropout, the max1846/max1847 still operate with v in as low as 3v. for best performance, it is recommended to connect vl to in when the input supply is less than 4.5v. undervoltage lockout the max1846/max1847 have an undervoltage lockout circuit that monitors the voltage at vl. if vl falls below the uvlo threshold (2.8v typ), the control logic turns the p-channel fet off (ext high impedance). the rest of the ic circuitry is still powered and operating. when vl increases to 60mv above the uvlo threshold, the ic resumes operation from a start up condition (soft-start). soft-start the max1846/max1847 feature a digital soft-start that is preset and requires no external capacitor. upon startup, the fb threshold decrements from the refer- ence voltage to 0 in 64 steps over 1024 cycles of f osc or f sync . see the typical operating characteristics for a scope picture of the soft-start operation. soft-start is implemented: 1) when power is first applied to the ic, 2) when exiting shutdown with power already applied, and 3) when exiting undervoltage lockout. shutdown (max1847 only) the max1847 shuts down to reduce the supply current to 10a when shdn is low. in this mode, the internal ref- erence, error amplifier, comparators, and biasing circuit- ry turn off. the ext output becomes high impedance and the external pullup resistor connected to ext pulls v ext to v in , turning off the p-channel mosfet. when in shutdown mode, the converters output goes to 0. frequency synchronization (max1847 only) the max1847 is capable of synchronizing its switching frequency with an external clock source. drive sync with a logic-level clock input signal to synchronize the max1847. a switching cycle starts on the rising edge of the signal applied to sync. note that the frequency of the signal applied to sync must be higher than the default frequency set by r freq . this frequency is required so that the internal clock does not start a switching cycle prematurely. if sync is inactive for an entire clock cycle of the internal oscillator, the internal oscillator takes over the switching operation. choose r freq such that f osc = 0.9 f sync . ext polarity (max1847 only) the max1847 features an option to utilize an n-channel mosfet configuration, rather than the typical p-chan- nel mosfet configuration (figure 1). in order to drive the different polarities of these mosfets, the max1847 is capable of reversing the phase of ext by 180 degrees. when driving a p-channel mosfet, connect pol to gnd. when driving an n-channel mosfet, con- nect pol to vl. these pol connections ensure the proper polarity for ext. for design guidance in regard to this application, refer to the max1856 data sheet. design procedure initial specifications in order to start the design procedure, a few parameters must be identified: the minimum input voltage expected (v in(min) ), the maximum input voltage expected (v in(max) ), the desired output voltage (v out ), and the expected maximum load current (i load ). calculate the equivalent load resistance this is a simple calculation used to shorten the verifica- tion equations: r load = v out / i load
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 12 ______________________________________________________________________________________ calculate the duty cycle the duty cycle is the ratio of the on-time of the mosfet switch to the oscillator period. it is determined by the ratio of the input voltage to the output voltage. since the input voltage typically has a range of operation, a minimum (d min ) and maximum (d max ) duty cycle is calculated by: where v d is the forward drop across the output diode, v sw is the drop across the external fet when on, and v lim is the current-limit threshold. to begin with, assume v d = 0.5v for a schottky diode, v sw = 100mv, and v lim = 100mv. remember that v out is negative when using this formula. setting the output voltage the output voltage is set using two external resistors to form a resistive-divider to fb between the output and ref (refer to r1 and r2 in figure 1). v ref is nominally 1.25v and the regulation voltage for fb is nominally 0. the load presented to the reference by the feedback resistors must be less than 500a to guarantee that v ref is in regulation (see electrical characteristics table ). conversely, the current through the feedback resistors must be large enough so that the leakage cur- rent of the fb input (50na) is insignificant. therefore, select r2 so that i r2 is between 50a and 250a. i r2 = v ref / r2 where v ref = 1.25v. a typical value for r2 is 10k ? . once r2 is selected, calculate r1 with the following equation: r1 = r2 x (-v out / v ref ) setting the operating frequency the max1846/max1847 are capable of operating at switching frequencies from 100khz to 500khz. choice of operating frequency depends on a number of fac- tors: 1) noise considerations may dictate setting (or syn- chronizing) f osc above or below a certain fre- quency or band of frequencies, particularly in rf applications. d vv vvvvv max out d in min sw lim out d = + + ? ?? ? () d vv vvvvv min out d in max sw lim out d = + ?+ ? ?? () comp 0.033 f 270k ? sync 150k ? gnd freq vl v in +12v v out -48v at 100ma 12 f 100v 12 f 25v 2 14 13 12 6 5 3 4 0.05 ? 0.5w 1800pf 15 0.47 f 0.1 f 10, 11 ext pgnd ref in cs fb n.c. max1847 10.0k ? 1% 383k ? 1% 7, 9 pol 1 8 16 vp1-0190 12.2 h 1:4 cmr1u-02 470 ? 100pf 100v shdn irll2705 figure 1. using an n-channel mosfet (max1847 only)
max1846/max1847 high-efficiency, current-mode, inverting pwm controller ______________________________________________________________________________________ 13 2) higher frequencies allow the use of smaller value (hence smaller size) inductors and capacitors. 3) higher frequencies consume more operating power both to operate the ic and to charge and discharge the gate at the external fet, which tends to reduce the efficiency at light loads. 4) higher frequencies may exhibit lower overall effi- ciency due to more transition losses in the fet; however, this shortcoming can often be nullified by trading some of the inductor and capacitor size benefits for lower-resistance components. 5) high-duty-cycle applications may require lower frequencies to accommodate the controller mini- mum off-time of 0.4s. calculate the maximum oscillator frequency with the following formula: remember that v out is negative when using this formula. when running at the maximum oscillator frequency (f oscillator ) and maximum duty cycle (d max ), do not exceed the minimum value of d max stated in the electrical characteristics table. for designs that exceed the d max and f osc(max) , an autotransformer can reduce the duty cycle and allow higher operating frequencies. the oscillator frequency is set by a resistor, rfreq, which is connected from freq to gnd. the relation- ship between fosc (in hz) and rfreq (in ? ) is slightly nonlinear, as illustrated in the typical operating characteristics. choose the resistor value from the graph and check the oscillator frequency using the fol- lowing formula: external synchronization (max1847 only) the sync input provides external-clock synchroniza- tion (if desired). when sync is driven with an external clock, the frequency of the clock directly sets the max1847s switching frequency. a rising clock edge on sync is interpreted as a synchronization input. if the sync signal is lost, the internal oscillator takes over at the end of the last cycle, and the frequency is returned to the rate set by r freq . choose r freq such that f osc = 0.9 x f sync . choosing inductance value the inductance value determines the operation of the current-mode regulator. except for low-current applica- tions, most circuits are more efficient and economical operating in continuous mode, which refers to continu- ous current in the inductor. in continuous mode there is a trade-off between efficiency and transient response. higher inductance means lower inductor ripple current, lower peak current, lower switching losses, and, there- fore, higher efficiency. lower inductance means higher inductor ripple current and faster transient response. a reasonable compromise is to choose the ratio of induc- tor ripple current to average continuous current at mini- mum duty cycle to be 0.4. calculate the inductor ripple with the following formula: then calculate an inductance value: l = (v in(max) / i ripple ) x (d min / f osc ) choose the closest standard value. once again, remem- ber that v out is negative when using this formula. determining peak inductor current the peak inductor current required for a particular out- put is: i lpeak = i ldc + (i lpp / 2) where i ldc is the average dc inductor current and i lpp is the inductor peak-to-peak ripple current. the i ldc and i lpp terms are determined as follows: where l is the selected inductance value. the satura- tion rating of the selected inductor should meet or exceed the calculated value for i lpeak , although most coil types can be operated up to 20% over their satura- tion rating without difficulty. in addition to the saturation criteria, the inductor should have as low a series resis- i i d i vvvxd lxf ldc load max lpp in min sw lim max osc = ? () = ?? () () 1 i ivvvvv vvv ripple load max in max sw lim out d in max sw lim = + () () ?? ? ?? 04 . () () () f rr osc freq freq = () + () () () ? ? ? ? ? ? ?? ? ? 1 5 21 10 1 92 10 4 86 10 711 19 2 . . . f vvv vvvvv t osc max in min sw lim in min sw lim out d off min () () () () = + ?? ?? ? 1
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 14 ______________________________________________________________________________________ tance as possible. for continuous inductor current, the power loss in the inductor resistance (p lr ) is approxi- mated by: where r l is the inductor series resistance. once the peak inductor current is calculated, the cur- rent sense resistor, r cs , is determined by: r cs = 85mv / i lpeak for high peak inductor currents (>1a), kelvin-sensing connections should be used to connect cs and pgnd to r cs . connect pgnd and gnd together at the ground side of r cs . a lowpass filter between r cs and cs may be required to prevent switching noise from tripping the current-sense comparator at heavy loads. connect a 100 ? resistor between cs and the high side of r cs , and connect a 1000pf capacitor between cs and gnd. checking slope-compensation stability in a current-mode regulator, the cycle-by-cycle stability is dependent on slope compensation to prevent sub- harmonic oscillation at duty cycles greater than 50%. for the max1846/max1847, the internal slope compen- sation is optimized for a minimum inductor value (l min ) with respect to duty cycle. for duty cycles greater then 50%, check stability by calculating lmin using the fol- lowing equation: where v in(min) is the minimum expected input voltage, m s is the slope compensation ramp (41 mv/s) and d max is the maximum expected duty cycle. if l min is larger than l, increase the value of l to the next stan- dard value that is larger than l min to ensure slope compensation stability. choosing the inductor core choosing the most cost-effective inductor usually requires optimizing the field and flux with size. with higher output voltages the inductor may require many turns, and this can drive the cost up. choosing an inductor value at l min can provide a good solution if discontinuous inductor current can be tolerated. powdered iron cores can provide the most economical solution but are larger in size than ferrite. power mosfet selection the max1846/max1847 drive a wide variety of p-chan- nel power mosfets (pfets). the best performance, especially with input voltages below 5v, is achieved with low-threshold pfets that specify on-resistance with a gate-to-source voltage (v gs ) of 2.7v or less. when selecting a pfet, key parameters include: ? total gate charge (q g ) ? reverse transfer capacitance (c rss ) ? on-resistance (r ds(on) ) ? maximum drain-to-source voltage (v ds(max) ) ? minimum threshold voltage (v th(min) ) at high-switching rates, dynamic characteristics (para- meters 1 and 2 above) that predict switching losses may have more impact on efficiency than r ds(on ), which predicts dc losses. q g includes all capacitance associated with charging the gate. in addition, this parameter helps predict the current needed to drive the gate at the selected operating frequency. the power mosfet in an inverting converter must have a high enough voltage rating to handle the input voltage plus the magnitude of the output voltage and any spikes induced by leakage inductance and ringing. an rc snubber circuit across the drain to ground might be required to reduce the peak ringing and noise. choose r ds(on)(max) specified at v gs < v in(min) to be one to two times r cs . verify that v in(max) < v gs(max) and v ds(max) > v in(max) - v out + v d . choose the rise- and fall-times (t r , t f ) to be less than 50ns. output capacitor selection the output capacitor (c out ) does all the filtering in an inverting converter. the output ripple is created by the variations in the charge stored in the output capacitor with each pulse and the voltage drop across the capacitors equivalent series resistance (esr) caused by the current into and out of the capacitor. there are two properties of the output capacitor that affect ripple voltage: the capacitance value, and the capacitors esr. the output ripple due to the output capacitors value is given by: v ripple-c = (i load d max t osc ) / c out the output ripple due to the output capacitors esr is given by: v ripple-r = i lpp r esr these two ripple voltages are additive and the total out- put ripple is: v ripple-t = v ripple-c + v ripple-r lvxrm xxd d min in min cs s max max = () ? ? ? ? ? ? ()() ? ? ? ? ? ? ?? () / / 211 prx i id lr l load max ~ ? ? ? ? ? ? ? 2
max1846/max1847 high-efficiency, current-mode, inverting pwm controller ______________________________________________________________________________________ 15 the esr-induced ripple usually dominates this last equation, so typically output capacitor selection is based mostly upon the capacitors esr, voltage rating, and ripple current rating. use the following formula to determine the maximum esr for a desired output ripple voltage (v ripple-d ): r esr = v ripple-d / i l pp select a capacitor with esr rating less than r esr . the value of this capacitor is highly dependent on dielectric type, package size, and voltage rating. in general, when choosing a capacitor, it is recommended to use low-esr capacitor types such as ceramic, organic, or tantalum capacitors. ensure that the selected capacitor has suffi- cient margin to safely handle the maximum rms ripple current. for continuous inductor current the maximum rms ripple current in the output filter capacitor is: choosing compensation components the max1846/max1847 are externally loop-compen- sated devices. this feature provides flexibility in designs to accommodate a variety of applications. proper compensation of the control loop is important to prevent excessive output ripple and poor efficiency caused by instability. the goal of compensation is to cancel unwanted poles and zeros in the dc-dc con- verters transfer function created by the power-switch- ing and filter elements. more precisely, the objective of compensation is to ensure stability by ensuring that the dc-dc converters phase shift is less than 180 by a safe margin, at the frequency where the loop gain falls below unity. one method for ensuring adequate phase margin is to introduce corresponding zeros and poles in the feedback network to approximate a single-pole response with a -20db/decade slope all the way to unity-gain crossover. calculating poles and zeros the max1846/max1847 current-mode architecture takes the double pole caused by the inductor and out- put capacitor and shifts one of these poles to a much higher frequency to make loop compensation easier. to compensate these devices, we must know the cen- ter frequencies of the right-half plane zero (z rhp ) and the higher frequency pole (p out2 ). calculate the z rhp frequency with the following formula: the calculations for p out2 are very complex. for most applications where v out does not exceed -48v (in a negative sense), the p out2 will not be lower than 1/8th of the oscillator frequency and is generally at a higher frequency than z rhp . therefore: p out2 0.125 f osc a pole is created by the output capacitor and the load resistance. this pole must also be compensated and its center frequency is given by the formula: p out1 = 1 / (2 r load c out ) finally, there is a zero introduced by the esr of the out- put capacitor. this zero is determined from the follow- ing equation: z esr = 1 / (2 c out r esr ) calculating the required pole frequency to ensure stability of the max1846/max1847, the gain of the error amplifier must roll-off the total loop gain to 1 before z rhp or p out2 occurs. first, calculate the dc open-loop gain, a dc : where: a cs is the current sense amplifier gain = 3.3 b is the feedback-divider attenuation factor = g m is the error-amplifier transconductance = 400 a/v r o is the error-amplifier output resistance = 3 m ? r cs is the selected current-sense resistor determining the compensation component values select a unity-gain crossover frequency (f cros ), which is lower than z rhp and p out2 and higher than p out1 . using f cros , calculate the compensation resistor (r comp ). r fxr axp f comp cros o dc out cros = ? 1 r rr 2 12 + a bxg r d r axr dc m o max load cs cs xx = ? () 1 z dxv vxr xv l rhp max in min out load out = ?? () ? () ? ? ? ? ? ? ? ? () 1 2 2 () i i id xd d rms load max max max = ? ? 2
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 16 ______________________________________________________________________________________ select the next smaller standard value of resistor and then calculate the compensation capacitor required to cancel out the output-capacitor-induced pole (p out1 ) determined previously. choose the next larger standard value of capacitor. in order for p comp to compensate the loop, the open- loop gain must reach unity at a lower frequency than the right-half-plane zero or the second output pole, whichever is lower in frequency. if the second output pole and the right-half-plane zero are close together in frequency, the higher resulting phase shift at unity gain may require a lower crossover frequency. for duty cycles greater than 50%, slope compensation reduces a dc , reducing the actual crossover frequency from f cros . it is also a good practice to reduce noise on comp with a capacitor (c comp2 ) to ground. to avoid adding extra phase margin at the crossover, the capacitor (c comp2 ) should roll-off noise at five times the crossover frequency. the value for c comp2 can be found using: it might require a couple iterations to obtain a suitable combination of compensation components. finally, the zero introduced by the output capacitors esr must be compensated. this compensation is accomplished by placing a capacitor between ref and fb creating a pole directly in the feedback loop. calculate the value of this capacitor using the frequen- cy of z esr and the selected feedback resistor values with the formula: when using low-esr, ceramic chip capacitors (mlccs) at the output, calculate the value of c fb as follows: applications information maximum output power the maximum output power that the max1846/max1847 can provide depends on the maximum input power available and the circuits efficiency: p out(max) = efficiency p in(max) furthermore, the efficiency and input power are both functions of component selection. efficiency losses can be divided into three categories: 1) resistive losses across the inductor, mosfet on-resistance, current- sense resistor, rectification diode, and the esr of the input and output capacitors; 2) switching losses due to the mosfets transition region, and charging the mos- fets gate capacitance; and 3) inductor core losses. typically, 80% efficiency can be assumed for initial cal- culations. the required input power depends on the inductor current limit, input voltage, output voltage, out- put current, inductor value, and the switching frequen- cy. the maximum output power is approximated by the following formula: p max = [v in - (v lim + i lim x r ds(on) )] x i lim x [1 - (lir / 2)] x [(-v out + v d ) / (v in - v sw - v lim - v out + v d )] where i lim is the peak current limit and lir is the inductor current-ripple ratio and is calculated by: lir = i lpp / i ldc again, remember that v out for the max1846/ max1847 is negative. diode selection the max1846/max1847s high-switching frequency demands a high-speed rectifier. schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. ensure that the diodes average current rating exceeds the peak inductor current by using the diode manufacturers data. additionally, the diodes reverse breakdown voltage must exceed the potential difference between v out and the input voltage plus the leakage-inductance spikes. for high output voltages (-50v or more), schottky diodes may not be practical because of this voltage requirement. in these cases, use an ultrafast recovery diode with ade- quate reverse-breakdown voltage. input filter capacitor the input capacitor (c in ) must provide the peak current into the inverter. this capacitor is selected the same way c rr frr fb osc . = + 12 12 2314 crxcx rr rxr fb esr out = + 12 12 c rr xxfxrxr comp o comp cros o comp 2 5628 . = + c xp xr comp out comp . = 1 628 1
max1846/max1847 high-efficiency, current-mode, inverting pwm controller ______________________________________________________________________________________ 17 as the output capacitor (c out ). under ideal conditions, the rms current for the input capacitor is the same as the output capacitor. the capacitor value and esr must be selected to reduce noise to an acceptable value and also handle the ripple current (i nrms ) where: bypass capacitor in addition to c in and c out , other ceramic bypass capacitors are required with the max1846/max1847. bypass ref to gnd with a 0.1f or larger capacitor. bypass v l to gnd with a 0.47f or larger capacitor. all bypass capacitors should be located as close to their respective pins as possible. pc board layout guidelines good pc board layout and routing are required in high- frequency-switching power supplies to achieve good reg- ulation, high efficiency, and stability. it is strongly recommended that the evaluation kit pc board layouts be followed as closely as possible. place power components as close together as possible, keeping their traces short, direct, and wide. avoid interconnecting the ground pins of the power components using vias through an internal ground plane. instead, keep the power components close together and route them in a star ground configu- ration using component-side copper, then connect the star ground to internal ground using multiple vias. main application circuits the max1846/max1847 are extremely versatile devices. figure 2 shows a generic schematic of the max1846. table 1 lists component values for several typical appli- cations. these component values also apply to the max1847. the first two applications are featured in the max1846/max1847 ev kit. i xi id xd d nrms max max max o = ? ? 12 2 . ( ) comp c comp r comp r freq gnd freq vl v in v out c out c in 1 9 8 7 5 4 2 3 p l1 r cs c fb d1 10 22k 0.47 f 0.1 f 6 ext pgnd ref in cs fb max1846 r2 r1 application b only note: applications a & b use pos capacitors. applications c & d use aluminum electrolytic capacitors. c comp2 figure 2. max1846 main application circuit
max1846/max1847 high-efficiency, current-mode, inverting pwm controller 18 ______________________________________________________________________________________ supplier component phone website avx capacitors 803-946-0690 www.avxcorp.com central semiconductor diodes 516-435-1110 www.centralsemi.com coilcraft inductors 847-639-6400 www.coilcraft.com dale resistors 402-564-3131 www.vishay.com/company/brands/dale/ fairchild mosfets 408-721-2181 www.fairchildsemi.com international rectifier mosfets 310-322-3331 www.irf.com irc resistors 512-992-7900 www.irctt.com kemet capacitors 864-963-6300 www.kemet.com on semiconductor mosfets, diodes 602-303-5454 www.onsemi.com panasonic capacitors, resistors 201-348-7522 www.panasonic.com sanyo capacitors 619-661-6835 www.secc.co.jp siliconix mosfets 408-988-8000 www.siliconix.com sprague capacitors 603-224-1961 www.vishay.com/company/brands/sprague/ sumida inductors 847-956-0666 www.remtechcorp.com vitramon resistors 203-268-6261 www.vishay.com/company/brands/vitramon/ component suppliers note: indicate that you are using the max1846/max1847 when contacting these component suppliers. circuit id abcd input (v) 12 3 to 5.5 12 12 output (v) -5 -12 -48 -72 output (a) 2 0.4 0.1 0.1 c comp (f) 0.047 0.22 0.1 0.068 c in (f) 3 x 10 3 x 22 10 10 c out (f) 2 x 100 2 x 47 39 39 c fb (pf) 390 1200 1000 1000 r1 (k ? ) (1%) 40.2 95.3 383 576 r2 (k ? ) (1%) 10 10 10 10 r comp (k ? ) 8.2 10 220 470 r cs ( ? ) 0.02 0.02 0.05 0.05 r freq (k ? ) 150 150 150 150 d1 cmsh5-40 cmsh5-40 cmr1u-02 cmr1u-02 l1 (h) 10 10 47 82 p1 fds6685 fds6375 irfr5410 irfr5410 c comp2 (pf) 220 220 22 12 table 1. component list for main application circuits
max1846/max1847 high-efficiency, current-mode, inverting pwm controller ______________________________________________________________________________________ 19 chip information process: bicmos qsop 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 pol sync in ext cs pgnd gnd gnd n.c. max1847 vl freq fb comp ref n.c. 1 + + 2 3 4 5 10 9 8 7 6 in ext cs pgnd ref comp freq vl max1846 max top view gnd fb shdn package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package draw- ings may show a different suffix character, but the drawing per- tains to the package regardless of rohs status. package type package code outline no. land pattern no. 10 max u10+2 21-0061 90-0330 16 qsop e16+1 21-0055 90-0167 pin configurations
max1846/max1847 high-efficiency, current-mode, inverting pwm controller maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 2 9/10 added equation in the determining the compensation component values section 16

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